Solid state imaging detectors, such as charge-coupled devices and CMOS imaging detectors, are conventionally illuminated through the front surface. In this configuration, structures designed for circuit operation (including patterned oxides, polysilicon electrodes, and metal interconnects) cause reduction of quantum efficiency and loss of resolution by absorption and scattering of incident light. Soon after the invention of charge-coupled devices, a back-illuminated CCD was demonstrated, in which light the imaging detector is flipped upside down and illuminated from the opposite side of the silicon wafer. Back-illumination typically requires removal of the low-resistivity substrate and passivation of the exposed silicon surface. In the case of high resistivity substrates, substrate removal is not required, but substrate thinning and surface passivation are still required to achieve high, stable quantum efficiency across a broad spectral range. Various technologies for thinning are described in the literature.
Surface passivation has been a critical part of silicon device development from the beginning. The first successful demonstration of amplification with a solid-state transistor closely followed John Bardeen's seminal paper on the role of surface charge and rectification at the semiconductor surface, and the development of integrated circuits in the 1960's was enabled by the discovery of technologies for surface passivation with thermal oxides. Virtually all semiconductor devices—including especially solid-state imaging devices—depend for their performance and stability on surface passivation processes. Since the first demonstration of silicon CCDs in 1969, many of the key advances in device performance have been related to the passivation of the Si—SiO2 surface, including especially the front-side developments of buried channel devices, and surface inversion during charge integration (also known as multi-pinned phase, or MPP). Back-illuminated detectors were demonstrated as early as 1974, but the performance of these early back-illuminated devices suffered from the lack of an adequate surface passivation technology. The significance of this problem was realized by NASA in the aftermath of the 1984 discovery of quantum efficiency hysteresis in CCDs built into the Hubble Space Telescope's Wide Field/Planetary Camera (WF/PC). Instabilities related to surface traps and poor passivation plagued WF/PC practically up to the 1992 launch of WF/PC II, in which back-illumination was abandoned in favor of phosphor-coated, front-illuminated CCDs.
JPL developed delta-doping in 1992 as a method and device for achieving stable, high ultraviolet quantum efficiency in silicon CCDs (U.S. Pat. No. 5,376,810, Dec. 27, 1994). Initial MBE growths at JPL in 1991 used MBE to grow 5 nm of uniformly boron-doped silicon, as described in Michael E. Hoenk, Paula J. Grunthaner, Frank J. Grunthaner, R. W. Terhune, and Masoud Fattahi, “Epitaxial growth of p+ silicon on a backside-thinned CCD for enhanced UV response,” Proc. SPIE 1656, 488 (1992). In all subsequent growths on CCDs and other imaging detectors, JPL used MBE to grow delta-doped silicon layers for surface passivation, as described in Michael E. Hoenk, Paula J. Grunthaner, Frank J. Grunthaner, R. W. Terhune, Masoud Fattahi, and Hsin-Fu Tseng, “Growth of a delta-doped silicon layer by molecular beam epitaxy on a charge-coupled device for reflection-limited ultraviolet quantum efficiency,” Appl. Phys. Lett. 61, 1084 (1992). This approach used highly doped silicon to create a strong near-surface electric field and eliminate the back surface potential well, thus passivating the silicon surface and achieving the desired high quantum efficiency and stability. The development of low-temperature MBE processes at JPL in the 1980's was an important technology for the implementation of MBE-growth as a surface passivation technology for CCDs.
There is a need for systems and methods that can provide silicon devices having improved passivation of surfaces and interfaces (especially over large area devices and/or wafers), in order to provide improvement of operating parameters (such as improved stability, reduced leakage and/or dark current, and improved efficiency), and/or improved manufacturing parameters (such as yield and throughput).